1. Field of the Invention
This invention relates generally to the execution of decimal alphanumeric instructions by a commercial instruction processor of a data processing system, and more specifically to apparatus which controls the selection of decimal digits when executing decimal arithmetic instructions.
2. Description of the Prior Art
A data processing system which executes decimal arithmetic instructions includes a main memory for storing the decimal arithmetic instructions and operands. The operands may be in packed decimal form or string decimal form. The packed decimal operand includes up to 8 decimal digits stored in each double word, 4 binary data bits per decimal digit. The string decimal operand includes up to 4 bytes in each double word. Each byte may represent a decimal digit in the form of 4 zone bits and 4 binary data bits.
During the execution of the decimal numeric instructions, the corresponding decimal digits for each operand are processed sequentially. For example, during a decimal add instruction, the decimal digits of each operand are added sequentially, least significant decimal digit first.
Since an operand may be in the string decimal form, it is necessary to either strip the zone bits from the operand or in some manner slip over the zone bits.
U.S. Pat. No. 4,272,828 issued June 6, 1981 entitled "Arithmetic Logic Apparatus for a Data Processing System" describes firmware controlled apparatus for incrementing or decrementing a decimal digit position pointer for aligning the corresponding decimal digits of the operands. This system required a number of firmware routines for positioning the pointer for the different operand forms.
It should be understood that the references cited herein are those of which the applicants are aware and are presented to acquaint the reader with the level of skill in the art and may not be the closest reference to the invention. No representation is made that any search has been conducted by the applicants.